IBM has announced a new chip architecture it calls the world’s first sub-1 nanometer technology for AI data centers. The design integrates nearly 100 billion transistors on a chip the size of a fingernail, roughly doubling transistor density compared to the previous generation.
According to IBM, this delivers significant improvements in compute performance and energy efficiency. While physical transistors below 1 nanometer are not yet feasible, the company’s ‘nanostack’ architecture achieves the performance gains expected from such miniaturization.
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