IBM has introduced a new chip architecture that packs nearly 100 billion transistors onto a chip the size of a fingernail, approximately double the density of its previous generation. The company calls it the world’s first sub-1 nanometer chip technology, though the term refers to performance equivalence rather than actual physical transistor dimensions, which remain impractical at that scale. The architecture is designed to deliver significant gains in compute performance and energy efficiency for AI data centers.
IBM Unveils Sub-1 Nanometer Chip Technology, Doubling Transistor Density for AI
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